Review: OCZ PC3200 EL DDR DUAL CHANNEL MEMORY

by Tarinder Sandhu on 17 May 2003, 00:00 3.5

Tags: OCZ (NASDAQ:OCZ)

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Specs and discussion

Delving a little deeper into the specifications reveals the following attributes:

Specifications

  • 256MB module size x 2 (Available in 2 x 512MB)

  • Implemented using 32M x 8-bit (256-MBit) DDR unbuffered SDRAMs (TSOP) with OCZ's 5ns chips time. Single-sided RAM

  • ULN (Ultra Low Noise) shielded PCB

  • 184-pin DDR.

  • Integrated copper (with a plated, mirror finish) heatspreader for improved thermal performance

  • Lifetime OCZ limited warranty

  • Optimised for dual-channel operation

  • Six-layer PCB

  • Latency: 2-6-2-3 @ 2.5 - 2.6v @ DDR-400 speeds. (tRCD=3)

We've previously taken the heatspreaders off a PC3500 module and found OCZ's markings on the RAM. That's not conclusive evidence that OCZ manufacture their own modules, as TwinMOS often remark their RAM. 5ns represents 200MHz, DDR-400, PC3200 speeds. Take your pick of descriptions. If you want to know exactly how this all correlates together, a handy list is provided below:

Memory is rated in both its basic speed and the timings that it can run at with the specified speeds.

PC1600 - 1.600GB/s bandwidth (8-bytes x 100MHz clock speed x 2 transfers for the falling and rising of each clock cycle ), runs at DDR-200

PC2100 - 2.128GB/s bandwidth (8 x 133 x 2), runs at DDR-266

PC2400 - 2.400GB/s bandwidth (8 x 150 x 2), runs at DDR-300

PC2700 - 2.656GB/s bandwidth (8 x 166 x 2), runs at DDR-333

PC3200 - 3.200GB/s bandwidth (8 x 200 x 2), runs at DDR-400

PC3500 - 3.472GB/s bandwidth (8 x 217 x 2), runs at DDR-434

PC3700 - 3.728GB/s bandwidth (8 x 233 x 2), runs at DDR-466

RAMBUS PC800 - 3.200GB/s bandwidth (2-bytes x 800Mhz x 2 RIMMs)

RAMBUS PC1066 - 4.26GB/s bandwidth (2-bytes (16-bit) x 1066MHz x 2 RIMMs)

RIMM 4200 - 4.26GB/s bandwidth (4-bytes (32-bit) x 1066MHz )

That should have the speed issue sorted. Therefore, matching PC3200 memory to 200FB CPUs creates perfect synergy. It then all depends upon how the host CPU's FSB is pumped, dual or quad (AMD or Intel). A double-pumped CPU's bandwidth requirements will be met by single-channel DDR memory, just. Generally speaking, the more we have at our disposal, the better the overall performance.

Basic speed is one facet of overall RAM performance. The other facet is the speed at which the RAM can turn around requests made by the CPU. The faster the data can be outputted back to the CPU after it has made the request, the better the overall performance. Here's where low latency bandwidth becomes crucial. Lower latencies, often defined by a number of parameters, are the real keys into high performance at any given FSB. You'd think that CAS Latency, the time taken for the data to move out to the output buffers, would be the key determinant. That's what most of us like to believe. However, with DDR's architecture able to compensate for CAS Latency by using clock forwarding, the effects of CAS latency are minimal. Try it yourself, run CL2.5 and CL2 on some high-speed DDR. There won't be much in it, performance-wise.

It's rather interesting that OCZ have chosen a tRCD (RAS-to-CAS delay) of 3 clocks. tRCD is the overall term applied to getting the entire data process moving in the first place. As this rating encompasses a whole lot of work for the RAM, it is by far the most critical factor with respect to performance. We'd happily swap a CL of 2 for a tRCD of 2 clocks. A tRCD of 2 clocks. by very definition, is difficult to specify and guarantee at high FSB, as the manufacturer has to take a whole host of factors into account. OCZ have taken the easy way out with these modules, it seems. We'll show what effect tRCD 2 has over tRCD3 later.

In summary, two DDR-400 modules, with reasonable latencies, housed in a single-sided format. We'll now see if they can work together. We'll also see what kind of benchmarks they produce as a pair.