Review: Scan 3XS AMD Chameleon

by Ryszard Sommefeldt on 24 October 2005, 10:17

Tags: Athlon 64 X2 4800+ , SCAN, AMD (NYSE:AMD)

Quick Link: HEXUS.net/qaduw

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Memory Subsystem Performance

After analysing platform performance first where we didn't see the increases expected, analysis of the memory system showed the main reason why.

Memory Bandwidth


A 15% increase in memory clock resulted in less than 4% more bandwidth compared to the HEXUS reference score. The memory in the SCAN 3XS Chameleon system, while running at 1T command rate, has latency clocks of 2.5-4-4-8. And while latencies don't affect overall performance too much on AMD Athlon 64-based systems, it's the reason why the measured deficit occurs here. Tighten up the latencies at the same clocks and bandwidth goes up.

Memory Latency


When the CPU is made to go out to main memory the 3XS Chameleon sits at a disadvantage compared to the HEXUS system. The lacklustre memory bandwidth and this latency deficit is why we don't see higher scaling from the CPU's overclock.

Pifast

Pifast backs it up with a less than 6% advantage.


Summary

Since the cores share a memory controller, any downsides in memory performance can be exacerbated in multi-threaded situations. The Chameleon in tested configuration isn't slow - as these CPU-limited benchmarks show - but it could be a bit quicker with certain memory at certain settings in multi-threaded CPU intensive scenarios.