At IDF 2011, Mark Bohr, senior research fellow and super-boffin, detailed how Intel has expanded the range of transistor types for each manufacturing process - some are designed for high-power, some for lower-power, lower-leakage, and some use qualities inherent in both. These enable them to be used in a wider range of products, clearly.
Coming back to high performance, Intel's Ivy Bridge microarchitecture, the codename for the next-generation chips, has been pushed back a little on the latest roadmap. The current news is that we'll see chips based on the technology come to the market in H1 2012, which is some six months later than was mooted at last year's IDF.
Ivy Bridge chips will use transistors produced on a 22nm process. Now, moving to a smaller process, whereby you fit more transistors for a given size, leads to inexorable problems associated with leakage current. Coming to a head at the incumbent 32nm process, Intel has already described how it will circumvent such problems for a while - enter the 3D transistor.
22nm-hewn chips will all use this tri-gate technology, which promises to provide the same performance as 32nm planar transistors but with, crucially, half the power usage. This is vitally important because an increasing number of chips are being designated for low-power usage - system-on-a-chip (SoC) being a prime example.
Talking specifics, Bohr said that tri-gate chips are more efficient than planar chips because there's no substrate impact on the inversion layer - which actively switches the transistor on and off - meaning it's fully depleted (or, putting it another way, has no charge). Planar chips have this leakage when the transistor is set to off, increasing inefficiency and therefore not being fully depleted at any time. One needs to invest in expensive engineering to make them so, by the way.
Putting it simply, fully-depleted technology means that one can reduce leakage current - up to 10x - from transistor source to drain. Lower leakage means one can switch transistors faster, translating to higher speed, or, just as importantly, run them at lower power.
Adding some numbers, Bohr said the 22nm tri-gate transistors can increase performance by 37 percent at low voltages or reduce power at the aforementioned constant performance level. He further said that, while new, tri-gate transistors only cost a few percent more than size-equivalent planar designs.
Bohr then went on to say that competitors are at least a year behind in transistor technology. They won't have tri-gate or 'fin-type' transistors until they hit a 14nm process, indicating that Intel will have a significant manufacturing lead.
We gathered that Intel is very bullish for the potential that exists for tri-gate transistors and, consequently, chips. The 22nm process is to be made available in a wide range of voltages, leakages and lower active-power characteristics. Partners can opt for a particular type of 22nm technology for use in servers, desktop, laptops (ultrabooks) and smartphones.
