Both Intel and GlobalFoundries gave process technology presentations at the IEEE International Electron Device Meeting (IEDM 2017) in San Francisco this week. This meeting ran over five days and is said to be one of the world’s preeminent forums for reporting technological breakthroughs in the areas of semiconductor and electronic device technology and associated sciences.
According to a report published by the EETimes, Intel will start to use Cobalt for the bottom two layers of its 10nm interconnect. The benefits are twofold; first of all Cobalt delivers a 5x to 10x improvement in electromigration, secondly its use results in a 2x reduction in via resistance. In its report the EETimes pondered that Intel's use of Cobalt could be a differentiator in the coming semiconductor manufacturing battles.
#IEDM2017 Highlight Paper 29.1 “A 10nm High Performance and Low-Power CMOS Technology Featuring 3rd-Generation FinFET Transistors, Self-Aligned Quad Patterning, Contact Over Active Gate and Cobalt Local Interconnects,” C. Auth et al, Intel https://t.co/ybmAbnvYLN pic.twitter.com/muh9VdIXl8— ieee iedm (@ieee_iedm) 4 December 2017
Previously we have learned that Intel's 10nm node will feature FinFETs with a 7nm fin width at a 34nm pitch and a 46nm fin height. These are made using self-aligned quadruple patterning (SAQP).
GlobalFoundries provided some specifics over its planned 7nm node. According to the report on the firm's IEDM 2017 presentation, GlobalFoundries will create a platform that is entirely based on immersion optical lithography "but is designed to enable the insertion of EUV for specific levels to improve cycle time and manufacturing efficiency".
The EETimes interviewed GlobalFoundries CTO Gary Paton after the presentation and asked a few questions. Paton admitted that kinks in EUV still need to be worked out but GlobalFoundries is installing its first EUV production tools at Fab 8 in New York.
#IEDM2017 Highlight Paper 29.5 “A 7nm CMOS Technology Platform for Mobile & High-Performance Compute Applications,” S. Narasimha et al, Globalfoundries. Integrated 7nm CMOS platform provides significant density scaling & performance improvements over 14nm. https://t.co/5cCSwcgNTM pic.twitter.com/XS2lYl6jDg— ieee iedm (@ieee_iedm) 4 December 2017
Like Intel, GlobalFoundries will use SAQP to make fins and double patterning. Interestingly it claims to have improved the 14nm process licensed from Samsung using its latest technology to deliver 2.8x density, up to 40 per cent better performance, and up to 55 per cent lower power. That is an encouraging result at this stage.
On the topic of the use of Cobalt by Intel, GolbalFoundries thought that sticking with copper/low-k provides reliability benefits, reducing complexity and yield risk. Furthermore, GlobalFoundries technical staff asserted that the copper system "still has a lot of juice left in it".