Press release
CAMBRIDGE, UK - Jun. 9, 2010 - ARM today announced the availability of the ARM® VSTREAMTM virtual debug interface; a fast and flexible virtual link that connects software debuggers to hardware assisted verification systems. VSTREAM enables more efficient software development in the early stages of system design, improving the utilization of hardware resources and reducing project risk and time-to-market for new ARM processor-based devices.
When used in conjunction with VSTREAM, software debuggers such as the ARM RVDTM debugger provide a responsive graphical debug environment for processors running on verification systems. From the debugger it is possible to stop the processor, view and change the value of processor registers and system memory and single-step through code. With VSTREAM large software images can be downloaded to memory in a matter of seconds.
VSTREAM implements a transaction-based connection to the RTL, not requiring any external hardware accessories to be physically attached. This lowers the setup and maintenance cost of hardware assisted verification farms and increases their flexibility when handling multiple remote debugger connections.
All current ARM CortexTM processors are supported by VSTREAM, including the ARM Cortex-A5 and ARM Cortex-M0 processors. Furthermore, it enables the simultaneous connection of multiple debuggers to a target, an essential function in bringing up multicore devices, such as those based on the Cortex-A9 MPCoreTM processor.
"System integration and validation are key requirements of the EDA360 vision. A combination of Cadence Verification Computing Platform, Palladium XP, and ARM's VSTREAM provides great visibility and turnaround time for application-driven ARM-based system developers," said Ran Avinun, Product Management Group Director for System Design and Verification at Cadence Design Systems. "Now Cadence and ARM deliver a hybrid environment supporting transaction-based acceleration and in-circuit emulation where multiple developers can enjoy increased productivity by validating their hardware and software pre-silicon, concurrently."
"Mentor Veloce emulators are widely used to validate and debug real-time operating systems and device drivers, running on complex systems-on chip (SoC)," said Jim Kenney, marketing director of Mentor Graphics Emulation Division. "The VSTREAM transactor executing on Veloce's TestBench XPress high-performance transaction environment delivers a 10x boost in debug performance when compared with serial JTAG. Our collaboration with ARM insures VSTREAM and Veloce deliver a highly productive embedded software debug experience."
"ARM is committed to providing our Silicon Partners with the best software tools to increase their design efficiency and reduce their time-to-market," said John Cornish, System Design Division executive vice president and general manager, ARM. "With the addition of VSTREAM to our range of development tools, a single debug environment can be used throughout the SoC design cycle, from SystemC models to emulation and final silicon."
See VSTREAM at DAC - 16-18 June 2010
A VSTREAM demo will be available at the Cadence booth (number 1334) and Mentor Graphics booth (number 1383).
Availability
VSTREAM is available now for usage with Cadence Palladium series and Palladium XP emulators, and with Mentor Veloce emulators. Support for other EDA tools will be added throughout the second half of 2010. For further details on VSTREAM visit www.arm.com/vstream or contact your ARM representative.
